Design solutions for low-power digital filters

High-accuracy mixed analog-digital CMOS integrated systems require low-power digital design solutions to avoid performance degradation due to crosstalk. In this paper, techniques for the design of a low-power digital filter are discussed. Conventional techniques based on structured design methodology with functional description and logic minimization, and innovative design approaches based on genetic search and optimization through simulated evolution are combined to minimize transition activity and, hence, power consumption of logic blocks.