Electrical performance evaluation for multi-chip assemblies using knowledge based approach

In this paper, preliminary work on electrical performance estimation and evaluation for multi-chip assemblies (i.e., multi-chip modules , chip on board, and etc.) is presented. A knowledge base is built to facilitate system performance merits evaluation process. Even though many other parameters can be included in the performance merit set, at this stage only electrical performance merits such as module frequency, module size and power dissipation are modeled. The other performance merits (e.g., cost estimation, thermal resistance and reliability, and etc.) are to be included in future work. Four major design/technology catagories of inputs were incorporated into the models to calculate the module frequency, module size, and power dissipation. The analytical formulas applied in this work were verified against our more exact solution tools developed in the University of Arizona. These equations are refined until model predictions are within acceptable tolerance of error. Initial four major groups are: 1. Interconnect technology: cross section geometry of the interconnection, thin film or thick film technology, substrate dielectric constants. 2. Logic technology: CMOS or nMOS technology, on chip delay estimation, detailed output driver delay estimation.