Towards a Hardware Trojan Detection Cycle

Intentionally inserted malfunctions in integrated circuits, referred to as Hardware Trojans, have become an emerging threat. Recently, the scientific community started to propose technical approaches to mitigate the threat of unspecified and potentially malicious functionality. However, these detection and prevention mechanisms are still hardly integrated in the industry's Hardware development life cycles. We therefore propose in this work a secure hardware development life cycle that assembles methods from trustworthy software engineering. In addition to full traceability from specification to implementation, and down to each gate, we introduce a feedback detection cycle that systematically escorts every single step of the development process. To do so, we integrate different detection methods for each development phase that are derived from a common knowledge base.

[1]  Mark Mohammad Tehranipoor,et al.  An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities , 2011, IEEE Transactions on Information Forensics and Security.

[2]  Farinaz Koushanfar,et al.  A Unified Framework for Multimodal Submodular Integrated Circuits Trojan Detection , 2011, IEEE Transactions on Information Forensics and Security.

[3]  Jia Di,et al.  Detecting Malicious Logic Through Structural Checking , 2007, 2007 IEEE Region 5 Technical Conference.

[4]  Florian Schupfer,et al.  Hardware Trojan detection by specifying malicious circuit properties , 2013, 2013 IEEE 4th International Conference on Electronics Information and Emergency Communication.

[5]  Michael S. Hsiao,et al.  A Novel Sustained Vector Technique for the Detection of Hardware Trojans , 2009, 2009 22nd International Conference on VLSI Design.

[6]  Olly Gotel,et al.  An analysis of the requirements traceability problem , 1994, Proceedings of IEEE International Conference on Requirements Engineering.

[7]  Swarup Bhunia,et al.  Security against hardware Trojan through a novel application of design obfuscation , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[8]  Mark Mohammad Tehranipoor,et al.  Red team: Design of intelligent hardware trojans with known defense schemes , 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

[9]  Edgar R. Weippl,et al.  Hardware Malware , 2013, Hardware Malware.

[10]  Joseph Zambreno,et al.  A case study in hardware Trojan design and implementation , 2011, International Journal of Information Security.

[11]  Swarup Bhunia,et al.  Sequential hardware Trojan: Side-channel aware design and placement , 2011, 2011 IEEE 29th International Conference on Computer Design (ICCD).

[13]  Mark Mohammad Tehranipoor,et al.  A layout-aware approach for improving localized switching to detect hardware Trojans in integrated circuits , 2010, 2010 IEEE International Workshop on Information Forensics and Security.

[14]  Miodrag Potkonjak,et al.  Gate-level characterization: Foundations and hardware security applications , 2010, Design Automation Conference.

[15]  Christof Paar,et al.  Stealthy dopant-level hardware Trojans: extended version , 2013, Journal of Cryptographic Engineering.

[16]  Mark Mohammad Tehranipoor,et al.  Case study: Detecting hardware Trojans in third-party digital IP cores , 2011, 2011 IEEE International Symposium on Hardware-Oriented Security and Trust.

[17]  Mark Mohammad Tehranipoor,et al.  A Novel Technique for Improving Hardware Trojan Detection and Reducing Trojan Activation Time , 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[18]  Michael S. Hsiao,et al.  A region based approach for the identification of hardware Trojans , 2008, 2008 IEEE International Workshop on Hardware-Oriented Security and Trust.

[19]  Hareesh Khattri,et al.  HSDL: A Security Development Lifecycle for hardware technologies , 2012, 2012 IEEE International Symposium on Hardware-Oriented Security and Trust.