FPGA implementation of a low complexity steganographic system for digital images

The main purpose of steganography is to hide the presence of communication process. Transparency is referred to the ability to avoid suspicion about the existence of a secret message. Several steganographic applications, such as secret communications and multimedia fingerprinting, require a real-time multi-channel behavior. Custom hardware architectures offer the possibility of fully exploiting the inherent parallelism of this type of algorithms for more demanding applications. This paper presents an efficient hardware implementation of a low complexity steganographic system using digital images as host signal. Results of implementing the proposed hardware architecture on a Field Programmable Gate Array (FPGA) are presented and discussed.