Performance and energy metrics for multi-threaded applications on DVFS processors
暂无分享,去创建一个
[1] Dong Li,et al. PowerPack: Energy Profiling and Analysis of High-Performance Systems and Applications , 2010, IEEE Transactions on Parallel and Distributed Systems.
[2] Rong Ge,et al. Power-Aware Speedup , 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.
[3] Anoop Gupta,et al. The SPLASH-2 programs: characterization and methodological considerations , 1995, ISCA.
[4] Karthikeyan Sankaralingam,et al. Power challenges may end the multicore era , 2013, CACM.
[5] Eric Saxe,et al. Power-efficient software , 2010, Commun. ACM.
[6] Efraim Rotem,et al. Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge , 2012, IEEE Micro.
[7] Alan D. George,et al. RapidIO for radar processing in advanced space systems , 2007, TECS.
[8] Simon W. Moore,et al. A communication characterisation of Splash-2 and Parsec , 2009, 2009 IEEE International Symposium on Workload Characterization (IISWC).
[9] Leon Atkins,et al. Algorithms for power savings , 2014 .
[10] Gerhard Wellein,et al. LIKWID: A Lightweight Performance-Oriented Tool Suite for x86 Multicore Environments , 2010, 2010 39th International Conference on Parallel Processing Workshops.
[11] Wu-chun Feng,et al. Towards efficient supercomputing: a quest for the right metric , 2005, 19th IEEE International Parallel and Distributed Processing Symposium.
[12] Rajesh K. Gupta,et al. Leakage aware dynamic voltage scaling for real-time embedded systems , 2004, Proceedings. 41st Design Automation Conference, 2004..
[13] Keqin Li,et al. Performance Analysis of Power-Aware Task Scheduling Algorithms on Multiprocessor Computers with Dynamic Voltage and Speed , 2008, IEEE Transactions on Parallel and Distributed Systems.
[14] G. Sohi,et al. A static power model for architects , 2000, Proceedings 33rd Annual IEEE/ACM International Symposium on Microarchitecture. MICRO-33 2000.
[15] Manuel Prieto,et al. Maximizing Power Efficiency with Asymmetric Multicore Systems , 2009, ACM Queue.
[16] Gurindar S. Sohi,et al. Adaptive, efficient, parallel execution of parallel programs , 2014, PLDI.
[17] Thomas Rauber,et al. Parallel Programming: for Multicore and Cluster Systems , 2010, Parallel Programming, 3rd Ed..
[18] Mark Horowitz,et al. Energy dissipation in general purpose microprocessors , 1996, IEEE J. Solid State Circuits.
[19] Kai Li,et al. PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors , 2008, 2008 IEEE International Symposium on Workload Characterization.
[20] Cacm Staff,et al. A conversation with David E. Shaw , 2009 .
[21] Lasse Natvig,et al. Performance and energy impact of parallelization and vectorization techniques in modern microprocessors , 2013, Computing.
[22] Marek Chrobak,et al. Algorithmic Aspects of Energy-Efficient Computing , 2012, Handbook of Energy-Aware and Green Computing.
[23] Qijun Gu,et al. Using the Greenup, Powerup, and Speedup metrics to evaluate software energy efficiency , 2015, 2015 Sixth International Green and Sustainable Computing Conference (IGSC).
[24] Michael Schwind,et al. Energy measurement and prediction for multi-threaded programs , 2014, SpringSim.
[25] Richard W. Vuduc,et al. Algorithmic Time, Energy, and Power on Candidate HPC Compute Building Blocks , 2014, 2014 IEEE 28th International Parallel and Distributed Processing Symposium.
[26] Michael Schwind,et al. Energy measurement, modeling, and prediction for processors with frequency scaling , 2014, The Journal of Supercomputing.
[27] Jose Renau,et al. Analysis of PARSEC workload scalability , 2016, 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).
[28] Z. Huang,et al. Metrics and task scheduling policies for energy saving in multicore computers , 2010, 2010 11th IEEE/ACM International Conference on Grid Computing.
[29] Chaitali Chakrabarti,et al. Energy-efficient dynamic task scheduling algorithms for DVS systems , 2008, TECS.
[30] Thomas Rauber,et al. Modeling and analyzing the energy consumption of fork‐join‐based task parallel programs , 2015, Concurr. Comput. Pract. Exp..
[31] Magnus Jahre,et al. Optimized hardware for suboptimal software: The case for SIMD-aware benchmarks , 2014, 2014 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).
[32] Kai Li,et al. The PARSEC benchmark suite: Characterization and architectural implications , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).