FAUST , an Asynchronous Network-on-Chip based Architecture for Telecom Applications

We present the FAUST chip (20 NoC nodes and units in a 130μm technology) and the FAUST platform addressing Telecom applications. The demo shows the feasibility of a complex GALS NoC architecture.

[1]  Jens Sparsø,et al.  Scheduling discipline for latency and bandwidth guarantees in asynchronous network-on-chip , 2005, 11th IEEE International Symposium on Asynchronous Circuits and Systems.

[2]  Edith Beigné,et al.  Design of on-chip and off-chip interfaces for a GALS NoC architecture , 2006, 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06).

[3]  Ran Ginosar,et al.  An asynchronous router for multiple service levels networks on chip , 2005, 11th IEEE International Symposium on Asynchronous Circuits and Systems.

[4]  Christian Bernard,et al.  A Telecom Baseband Circuit based on an Asynchronous Network-on-Chip , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[5]  Fabien Clermidy,et al.  An asynchronous NOC architecture providing low latency service and its multi-level design framework , 2005, 11th IEEE International Symposium on Asynchronous Circuits and Systems.