A 3.125-Gb/s clock and data recovery circuit for the 10-Gbase-LX4 Ethernet

A 3.125-Gb/s clock and data recovery (CDR) circuit using a half-rate digital quadricorrelator frequency detector and a shifted-averaging voltage-controlled oscillator is presented for 10-Gbase-LX4 Ethernet. It can achieve low-jitter operation and improve pull-in range without a reference clock. This CDR circuit has been fabricated in a standard 0.18-/spl mu/m CMOS technology. It occupies an active area of 0.6 /spl times/ 0.8 mm/sup 2/ and consumes 83 mW from a single 1.8-V supply. The measured bit-error rate is less than 10/sup -12/ for 2/sup 7/ - 1 PRBS 3.125-Gb/s data. It can meet the jitter tolerance specifications for the 10-Gbase-LX4 Ethernet application.

[1]  Moon-Sang Hwang,et al.  A 5 Gb/s 0.25 /spl mu/m CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[2]  Hoi-Jun Yoo,et al.  A 4-Gb/s CMOS clock and data recovery circuit using 1/8-rate clock technique , 2003 .

[3]  J. Long,et al.  A 10 Gb/s CDR/DEMUX with LC delay line VCO in 0.18 /spl mu/m CMOS , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[4]  Howard C. Luong,et al.  A 900-MHz CMOS low-phase-noise voltage-controlled ring oscillator , 2001 .

[5]  Michael M. Green,et al.  Design of CMOS CML circuits for high-speed broadband communications , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[6]  U. Langmann,et al.  A Si bipolar phase and frequency detector IC for clock extraction up to 8 Gb/s , 1992 .

[7]  B. Stilling.  Bit rate and protocol independent clock and data recovery , 2000 .

[8]  B. Razavi,et al.  A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector , 2001, IEEE J. Solid State Circuits.

[9]  Shen-Iuan Liu,et al.  A shifted-averaging VCO with precise multiphase outputs and low jitter operation , 2003, ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).