A cost-effective architecture for 8×8 two-dimensional DCT/IDCT using direct method
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[1] Nam Ik Cho,et al. On the regular structure for the fast 2-D DCT algorithm , 1993 .
[2] B. Lee. A new algorithm to compute the discrete cosine Transform , 1984 .
[3] Masahiko Yoshimoto,et al. A 100-MHz 2-D discrete cosine transform core processor , 1992 .
[4] Liang-Gee Chen,et al. High throughput CORDIC-based systolic array design for the discrete cosine transform , 1995, IEEE Trans. Circuits Syst. Video Technol..
[5] Weiping Li,et al. DCT/IDCT processor design for high data rate image coding , 1992, IEEE Trans. Circuits Syst. Video Technol..
[6] Martin Vetterli,et al. Fast 2-D discrete cosine transform , 1985, ICASSP '85. IEEE International Conference on Acoustics, Speech, and Signal Processing.
[7] N. Ahmed,et al. Discrete Cosine Transform , 1996 .
[8] Masato Edahiro,et al. DCT/IDCT processor for HDTV developed with dsp silicon compiler , 1993, J. VLSI Signal Process..
[9] Pierre Duhamel,et al. Polynomial transform computation of the 2-D DCT , 1990, International Conference on Acoustics, Speech, and Signal Processing.
[10] Alan N. Willson,et al. A 100 MHz 2-D 8×8 DCT/IDCT processor for HDTV applications , 1995, IEEE Trans. Circuits Syst. Video Technol..
[11] N. Cho,et al. Fast algorithm and implementation of 2-D discrete cosine transform , 1991 .