An efficient signature computation method

A signature generation algorithm for linear-feedback shift register (LFSR)-based compactors used in fault simulation of built-in self-test digital circuits is presented. The algorithm uses small- to medium-size lookup tables to generate signatures for internal as well as external exclusive-OR LFSRs of any length. The basic concept can be extended to general linear compactors. Algorithms that convert signatures from one form of LFSR to the other are also presented.<<ETX>>

[1]  Dilip V. Sarwate.  Computation of cyclic redundancy checks via table look-up , 1988, CACM.

[2]  Georgia Griffiths,et al.  The tea-leaf reader algorithm: an efficient implementation of CRC-16 and CRC-32 , 1987, CACM.

[3]  Kewal K. Saluja,et al.  An Efficient Method for Computation of Signatures , 1992, The Fifth International Conference on VLSI Design.

[4]  Prab Varma,et al.  A Fast Signature Simulation Tool for Built-In Self-Testing Circuits , 1987, 24th ACM/IEEE Design Automation Conference.

[5]  D. Lambidonis,et al.  FAST SIGNATURE COMPUTATION FOR LINEAR COMPACTORS , 1991, 1991, Proceedings. International Test Conference.