Gated Precharge: Using Temporal Locality of Subarrays to Save Deep- Submicron Cache Energy

Modern high-performance cache implementations use subarrays to reduce the capacitive load on the bitlines and achieve faster access time [6]. To overlap bitline precharging time with address decoding and wordline assertion, caches typically precharge all subarrays simultaneously prior to a cache access. Though only a small number of subarrays are accessed on a cache access, precharging all subarrays leads high energy consumption in modern and future high-performance deep-sub micron caches, because current CMOS scaling trends significantly increase the leakage from bitlines as process generation evolves [2, 3].