DESIGN OF THE SPIKING NEURON HAVING LEARNING CAPABILITIES BASED ON FPGA CIRCUITS
暂无分享,去创建一个
Abstract Hardware real-time implementations of Spiking Neuron Networks (SNN) are wanted for multiple applications. Introduction of the supervised learning mechanism for SNNs is a hot topic. A model of a single spiking neuron having that property is proposed. This is based on LIF simplified model. A number of design issues has been solved in order to enable the correct work of such a neuron during earning phase. The proposed extensions and modifications are described and illustrated with corresponding timing diagrams.
[1] Eduardo Ros,et al. Post-synaptic Time-Dependent Conductances in Spiking Neurons: FPGA Implementation of a Flexible Cell Model , 2003, IWANN.
[2] Andres Upegui,et al. An Functional Spiking Neuron Hardware Oriented Model , 2003, IWANN.
[3] Sander M. Bohte,et al. Error-backpropagation in temporally encoded networks of spiking neurons , 2000, Neurocomputing.
[4] Andrzej J. Kasinski,et al. Experimental Demonstration of Learning Properties of a New Supervised Learning Method for the Spiking Neural Networks , 2005, ICANN.