Non-Volatile Memory utilizing Reconfigurable Ferroelectric Transistors to enable Differential Read and Energy-Efficient In-Memory Computation
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Anand Raghunathan | Shubham Jain | Sumeet Kumar Gupta | Sandeep Krishna Thirumala | Shubham Jain | A. Raghunathan | S. Gupta | S. Thirumala
[1] Michael T. Niemier,et al. Design and benchmarking of ferroelectric FET based TCAM , 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.
[2] Sally A. McKee,et al. Hitting the memory wall: implications of the obvious , 1995, CARN.
[3] Naresh R. Shanbhag,et al. An energy-efficient VLSI architecture for pattern recognition via deep embedding of computation in SRAM , 2014, 2014 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).
[4] Sandeen Krishna Thirumala,et al. Gate Leakage in Non-Volatile Ferroelectric Transistors: Device-Circuit Implications , 2018, 2018 76th Device Research Conference (DRC).
[5] Stacey F. Bent,et al. A brief review of atomic layer deposition: from fundamentals to applications , 2014 .
[6] David Blaauw,et al. A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory , 2016, IEEE Journal of Solid-State Circuits.
[7] Sumeet Kumar Gupta,et al. Reconfigurable Ferroelectric Transistor–Part II: Application in Low-Power Nonvolatile Memories , 2019, IEEE Transactions on Electron Devices.
[8] S. Gupta,et al. Reconfigurable Ferroelectric Transistor—Part I: Device Design and Operation , 2019, IEEE Transactions on Electron Devices.
[9] Michael T. Niemier,et al. Computing in memory with FeFETs , 2018, ISLPED.
[10] Narayanan Vijaykrishnan,et al. A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support , 2018, ISLPED.
[11] Jing Li,et al. Challenges and Opportunities: From Near-memory Computing to In-memory Computing , 2017, ISPD.
[12] Anand Raghunathan,et al. Computing in Memory With Spin-Transfer Torque Magnetic RAM , 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[13] S. Datta,et al. Physics-Based Circuit-Compatible SPICE Model for Ferroelectric Transistors , 2016, IEEE Electron Device Letters.
[14] J. Kittl,et al. SoC Logic Compatible Multi-Bit FeMFET Weight Cell for Neuromorphic Applications , 2018, 2018 IEEE International Electron Devices Meeting (IEDM).
[15] An Chen,et al. A review of emerging non-volatile memory (NVM) technologies and applications , 2016 .
[16] Narayanan Vijaykrishnan,et al. Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems , 2018, ISLPED.
[17] Narayanan Vijaykrishnan,et al. Nonvolatile memory design based on ferroelectric FETs , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[18] Nishil Talati,et al. Logic Design Within Memristive Memories Using Memristor-Aided loGIC (MAGIC) , 2016, IEEE Transactions on Nanotechnology.
[19] Huazhong Yang,et al. Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs , 2019, IEEE Design & Test.