A LOW POWER TRANSREGIONAL MOSFET MODEL CMOS GIGASCALE INTEGRATION (GSI) * FOR COMPLETE POWER-DELAY ANALYSIS OF

A new compact transregional model for conventional surface channel inversion MOSFETs with continuous and smooth transitions at regional boundaries is introduced. The model, verified against MEDICI and HSPICE, describes all regions of operation, namely, subthreshold, linear, and saturation while including the effects of 1)carrier velocity saturation, .&')vertical and lateral high field mobility degradation, and 3)threshold voltage roll-off, all prominent characteristics of sub-micron devices. The key contribution of this model is the physical insight into the on/o$ current trade08 that ensues with voltage scaling and will be vital to future low power design. Utilizing the model for a complete power-delay analysis of CMOS circuit designs, analytical expressions are derived for: 1)propagation delav, 2)short circuit power (Psc), and 3)static power (Pstatic). Results from the total power (P~~t~l) consumption analysis indicate that PSC and Pstatic may constitute over 1/3 of PT~~~~ in future low powerfiigh performance CMOS GSI.