An inductance extraction method for on-chip signal lines based on HALO rules

Since VDSM designs tend to be much faster and denser, inductive effect is becoming more and more important.While parasitic inductance of interconnects has to be taken into account,most IC design and verification methodologies are becoming significantly complicated.In this paper,HALO rules are used to divide the chip interconnect into a collection of disjoint horizontal or vertical interaction regions.A quick inductance extraction method based on BP neural networks is presented to calculate loop inductance in the RLIE.Simulation results show that this method can estimate inductance values quickly and efficiently.It can be regarded as one kind of good design guidance for important nets.