A mismatch-shaping tree-structured digital-to-analog converter (DAC) utilizes several layers of switching blocks to spectrally shape the DAC circuit errors. A first-order mismatch-shaping DAC using un-dithered switching sequences for the switching blocks results in spurious tones in the DAC noise. The unwanted tones can be eliminated from the DAC noise by employing white dither sequences to randomly select two types of short root symbols to be placed in the switching sequences. Dithered switching sequences, unfortunately, result in a higher noise floor in the DAC noise, in comparison with un-dithered switching sequences. In this brief, we propose an improved first-order sequencing logic to eliminate unwanted tones while causing only a modest increase in the in-band noise floor at a very modest hardware cost. Our mismatch-shaping sequencing logic is based on the scheme using a white dither sequence to randomly select each symbol between two specific types of long root symbols. Alternatively, our scheme can be viewed as using a high-pass dither sequence to randomly select the short root symbols. An analytical formula for the power-spectral density of the proposed switching sequence is presented to show its improvement over the prior first-order switching sequence. It is also shown from numerical simulations that the proposed switching sequence improves the signal-to-noise plus distortion ratio by more than 5 dB for a sigma-delta modulator with static DAC-element errors chosen from a Gaussian distribution with a standard deviation of 1%
[1]
Ian Galton,et al.
Simplified logic for first-order and second-order mismatch-shaping digital-to-analog converters
,
2001
.
[2]
I. Galton,et al.
An audio ADC Delta-Sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC
,
2001,
IEEE J. Solid State Circuits.
[3]
G. Temes.
Delta-sigma data converters
,
1994
.
[4]
R. Baird,et al.
Linearity enhancement of multibit /spl Delta//spl Sigma/ A/D and D/A converters using data weighted averaging
,
1995
.
[5]
Franco Maloberti,et al.
Use of dynamic element matching in a multi-path sigma-delta modulator
,
2004,
2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).
[6]
I. Galton,et al.
A 3.3-V single-poly CMOS audio ADC delta-sigma modulator with 98-dB peak SINAD and 105-dB peak SFDR
,
2000,
IEEE Journal of Solid-State Circuits.
[7]
R. Schreier,et al.
Noise-shaped multbit D/A convertor employing unit elements
,
1995
.
[8]
Ian Galton.
Spectral shaping of circuit errors in digital-to-analog converters
,
1997
.
[9]
Ian Galton,et al.
A tight signal-band power bound on mismatch noise in a mismatch-shaping digital-to-analog converter
,
2004,
IEEE Transactions on Information Theory.