Combined approach of ROBDDs and structural analysis in the mapping and matching of logic functions

The technology mapping — final step of the logic synthesis — maps the decomposed Boolean function on physical cells. We address here the decomposition and the matching steps. We present two different ROBDD-based techniques to handle the decomposition problem, and compare them. For handling the matching step, we analyse a heuristics based on symmetry and develop a new structural approach, based on controlling value analysis and observation function deduction. This last appears to be efficient regarding the CPU time for checking the match with basic cells, mostly when don’t cares are present, and should be particularly interesting to handle the complex cells of FPGAs. Benchmarks are presented which validate the various heuristics.