Proposal for a versatile monolithic multi-Gbit/s m-sequence test system

A multi-functional system is proposed which combines four important features for m-sequence applications: Generation of m-sequences, detection of bit errors, derivation of word synchronisation pulses, and scrambling as well as descrambling of a data stream. Circuit simulations show that a monolithic realisation for data rates of more than 10Gbit/s is feasible using a simple self-aligning Si bipolar technology.