Hardware on-chip storage method applicable to infra-frame prediction reference pixels in HEVC (high efficiency video coding) standard

The invention belongs to the technical field of digital videos, and particularly relates to a hardware on-chip storage method applicable to infra-frame prediction reference pixels in the HEVC (high efficiency video coding) standard. In HEVC, the infra-frame prediction is executed based on executing of objects of blocks. Supposing the maximum unit of current codes is a 64*64 block including a total of 256 4*4 block bodies, 7 prediction pixels in each 4*4 block body serve as the reference pixels, and a storage space of at least 1792 pixels is needed. The reference pixels are separately stored in two storers, a line storer is used for storing the reference pixels, 1024 in total, on the upper right, the upside and the upper left; a column storer is used for storing the reference pixels, 1024 as well, on the upper left, the left side and the lower left; the access address is decided according to the positions of the corresponding 4*4 block bodies in the current 64*64 block. With the method, access capability of the reference pixels can be effectively improved, process time can be reduced, and real-time coding of the high-definition videos is realized.