Robust Controller Synthesis for Duration Calculus

[1]  Ron Koymans,et al.  Specifying real-time properties with metric temporal logic , 1990, Real-Time Systems.

[2]  Manuel Mazo,et al.  Specification-guided controller synthesis for linear systems and safe linear-time temporal logic , 2013, HSCC '13.

[3]  Mohsen A. Jafari,et al.  A Comparative Study of Synthesis Methods for Discrete Event Controllers , 1999, Formal Methods Syst. Des..

[4]  M. Raj Mohan,et al.  DCSynth: Guided Reactive Synthesis with Soft Requirements , 2019, VSTTE.

[5]  T. Henzinger.  The theory of hybrid automata , 1996, LICS 1996.

[6]  Rajeev Alur,et al.  Modeling and Verification of a Dual Chamber Implantable Pacemaker , 2012, TACAS.

[7]  Sanjit A. Seshia,et al.  Reactive synthesis from signal temporal logic specifications , 2015, HSCC.

[8]  Ofer Strichman,et al.  Bounded model checking , 2003, Adv. Comput..

[9]  Alberto L. Sangiovanni-Vincentelli,et al.  Model predictive control with signal temporal logic specifications , 2014, 53rd IEEE Conference on Decision and Control.

[10]  Ufuk Topcu,et al.  Optimization-based trajectory generation with linear temporal logic specifications , 2014, 2014 IEEE International Conference on Robotics and Automation (ICRA).

[11]  Wei Chen,et al.  dReach: δ-Reachability Analysis for Hybrid Systems , 2015, TACAS.

[12]  Christel Baier,et al.  Controller Synthesis for Probabilistic Systems , 2004, IFIP TCS.

[13]  Dejan Nickovic,et al.  Monitoring Temporal Properties of Continuous Signals , 2004, FORMATS/FTRTFT.

[14]  Ufuk Topcu,et al.  Reactive synthesis with maximum realizability of linear temporal logic specifications , 2019, Acta Informatica.

[15]  Nikolaj Bjørner,et al.  Z3: An Efficient SMT Solver , 2008, TACAS.

[16]  George J. Pappas,et al.  Robustness of temporal logic specifications for continuous-time signals , 2009, Theor. Comput. Sci..

[17]  Shankara Narayanan Krishna,et al.  On Sampling Abstraction of Continuous Time Logic with Durations , 2007, TACAS.

[18]  P. Pandya.  Specifying and Deciding Quantified Discrete-time Duration Calculus Formulae using DCVALID , 2000 .

[19]  Paritosh K. Pandya,et al.  Logical specification and uniform synthesis of robust controllers , 2019, MEMOCODE.

[20]  Zhou Chaochen,et al.  Duration Calculus: A Formal Approach to Real-Time Systems , 2004 .