A new FPGA-based Detection Method for Spurious Variations in PCBA Power Distribution Network

Nowadays, increasing demand for High-Performance Systems produces significant growth in usage of Field Programmable Gate Arrays (FPGAs) for different applications thanks to their flexibility and high level of parallelism. Such systems rely on complex multi-layer Printed Circuit Board Assemblies (PCBA)with a few dozens of hidden layers, stacked microvias and high-density interconnects. Along with creating new test challenges, the increasing PCBA complexity elevates the criticality of defects in various subsystems. One of such sub-systems is a Power-Delivery-Network (PDN) with operating margin progressively reduced due to increasingly strict requirements of High-Performance applications. As a consequence, Marginal Defects and process variations in a PDN may create latent problems that will manifest in a particular condition thus compromising the overall system performance and causing malfunctions. In this paper we propose a new FPGA-based non-intrusive method to detect Marginal Defects in a PCBA PDN. The method is based on a monitoring circuit that measures signal delays caused by PDN variations and thus detects relevant anomalies. Additional ad-hoc PDN stress circuits have been developed to validate the measurement technique. Experimental results demonstrating the consistency of the proposed approach are obtained by comparing stress and non-stress scenarios.

[1]  Peter Y. K. Cheung,et al.  A transition probability based delay measurement method for arbitrary circuits on FPGAs , 2008, 2008 International Conference on Field-Programmable Technology.

[2]  Heinz-Dietrich Wuttke,et al.  Automatic generation of an FPGA based embedded test system for printed circuit board testing , 2012, 2012 13th Latin American Test Workshop (LATW).

[3]  Mark Mohammad Tehranipoor,et al.  Identification of IR-drop hot-spots in defective power distribution network using TDF ATPG , 2010, 2010 5th International Design and Test Workshop.

[4]  Mehdi Baradaran Tahoori,et al.  Analysis of transient voltage fluctuations in FPGAs , 2016, 2016 International Conference on Field-Programmable Technology (FPT).

[5]  Peter Y. K. Cheung,et al.  Online Measurement of Timing in Circuits: For Health Monitoring and Dynamic Voltage & Frequency Scaling , 2012, 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines.

[6]  Kenneth P. Parker The effects of defects on high-speed boards , 2005, IEEE International Conference on Test, 2005..

[7]  Sergei Devadze,et al.  FPGA-based synthetic instrumentation for board test , 2012, 2012 IEEE International Test Conference.

[8]  Yves Audet,et al.  Delay Monitor Circuit and Delay Change Measurement Due to SEU in SRAM-Based FPGA , 2018, IEEE Transactions on Nuclear Science.

[9]  Prab Varma Current and Future Directions in Automatic Test Pattern Generation for Power Delivery Network Validation , 2012, 2012 IEEE 21st Asian Test Symposium.

[10]  Petr Pfeifer,et al.  On measurement of impact of the metallization and FPGA design to the changes of slice parameters and generation of delay faults , 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

[11]  Jacob A. Abraham,et al.  An area efficient on-chip static IR drop detector/evaluator , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[12]  Shi-Yu Huang,et al.  Testing power-delivery TSVs , 2015, 2015 6th Asia Symposium on Quality Electronic Design (ASQED).

[13]  Eric Bogatin,et al.  Signal and Power Integrity - Simplified , 2009 .

[14]  Joshua Ferry FPGA-based universal embedded digital instrument , 2013, 2013 IEEE International Test Conference (ITC).

[15]  Vaughn Betz,et al.  Frequency-Domain Power Delivery Network Self-Characterization in FPGAs for Improved System Reliability , 2018, IEEE Transactions on Industrial Electronics.

[16]  Sergei Devadze,et al.  Embedded instrumentation toolbox for screening marginal defects and outliers for production , 2017, 2017 IEEE AUTOTESTCON.

[17]  Sergei Devadze,et al.  Marginal PCB assembly defect detection on DDR3/4 memory bus , 2017, 2017 IEEE International Test Conference (ITC).