论文信息 - A comprehensive analysis of breakdown mechanisms in 4H-SiC MOSFET and JFET

A comprehensive analysis of breakdown mechanisms in 4H-SiC MOSFET and JFET

This paper presents a systematic analysis of breakdown mechanisms in silicon carbide MOSFET and JFET. For the MOSFET, the trench technology has been selected. The JFET structure is very similar to that having the distinctive feature of a buffer layer grown on the top of the drift region. Both devices are designed for 1.2 kV and were simulated and optimised using MEDICI and ISE TCAD software packages. This study indicates that the gate oxide breakdown puts a strong limitation on the electrical performance of the SiC trench MOSFET. Drawbacks encountered in SiC trench MOSFET, such as gate oxide breakdown, low channel mobility and the tight trade-off between the punch-through premature breakdown and the threshold voltage in the channel can be eliminated by using the SiC JFET.

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