60-GHz direct-conversion transceiver on 130-nm CMOS with integrated digital control interface

This paper describes the system architecture and design procedure for an integrated 60-GHz direct-conversion transceiver with integrated digital control interface on a 130-nm CMOS process. This transceiver incorporates both a transmitter and receiver. The transmitter achieves a Psat of 6.5 dBm, an OPldB of 1.6 dBm. The receiver achieves a conversion gain of 8.1 dB with an IIP3 of −13.74 dBm.

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