Sum of products: Computation using modular thermometer codes

This paper presents a method for computing inner products based on the distributed arithmetic principles and thermometer codes. The input is represented in the residue domain using thermometer codes while the output is encoded in the one-hot code format. Compared to the conventional methods of evaluating inner products using binary format, the proposed system provides an elegant way of performing the modular inner products computation due to the absence of the 2n modulo operation encountered in binary based methods. In addition, the modulo adder used in the proposed system can be implemented using simple shifter based circuit utilizing one-hot code format with no carry propagation involved in the addition.

[1]  Aviral Shrivastava,et al.  Fast and energy-efficient constant-coefficient FIR filters using residue number system , 2011, IEEE/ACM International Symposium on Low Power Electronics and Design.

[2]  B. Premkumar,et al.  Thermometer Code Based Modular Arithmetic , 2012, 2012 Spring Congress on Engineering and Technology.

[3]  A. Omondi,et al.  Residue Number Systems: Theory and Implementation , 2007 .

[4]  Chan Hua Vun,et al.  RNS encoding based folding ADC , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[5]  Luís Parrilla Roure,et al.  Residue Number Systems , 2014 .

[6]  S.A. White,et al.  Applications of distributed arithmetic to digital signal processing: a tutorial review , 1989, IEEE ASSP Magazine.

[7]  Fred J. Taylor,et al.  RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[8]  Fred J. Taylor,et al.  Implementation of RNS-Based Distributed Arithmetic Discrete Wavelet Transform Architectures Using Field-Programmable Logic , 2002, J. VLSI Signal Process..

[9]  Salvatore Pontarelli,et al.  Optimized Implementation of RNS FIR Filters Based on FPGAs , 2012, J. Signal Process. Syst..

[10]  Jr. W.A. Chren,et al.  One-hot residue coding for low delay-power product CMOS design , 1998 .

[11]  A. B. Premkumar,et al.  A modular approach to the computation of convolution sum using distributed arithmetic principles , 1999 .

[12]  P ? ? ? ? ? ? ? % ? ? ? ? , 1991 .

[13]  M.N.S. Swamy,et al.  Novel Design and Fpga Implementation of Da-rns Fir Filters , 2004, J. Circuits Syst. Comput..