Fault-Tolerant Asynchronous Sequential Machines
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A general design technique for achieving single fault-tolerant asynchronous sequential circuits is described. The design procedures apply over a large range of fault conditions and are extremely easy to use. Generally, less than three times the logic required for a single copy is needed to achieve single fault tolerance. In addition to fault tolerance, real time fault detection is easily achieved and it is immediately known when single fault tolerant capability is exceeded.
[1] Stephen H. Unger,et al. Asynchronous sequential switching circuits , 1969 .
[2] Chung-Jen Tan,et al. State Assignments for Asynchronous Sequential Machines , 1971, IEEE Transactions on Computers.
[3] Dhiraj K. Pradhan,et al. Fault-Tolerant Asynchronous Networks , 1973, IEEE Transactions on Computers.
[4] Gary K. Maki,et al. Asynchronous Sequential Machines Designed for Fault Detection , 1974, IEEE Transactions on Computers.