Modelling a Multi-Core Media Processor Using JCSP

Abstract. Manufacturers are creating multi-core processors to solve specialized problems. This kind of processor can process tasks faster by running them in parallel. This paper explores the usability of the Communicating Sequential Processes model to create a simulation of a multi-core processor aimed at media processing in hand-held mobile devices. Every core in such systems can have different capabilities and can generate different amounts of heat depending on the task being performed. Heat generated reduces the performance of the core. We have used mobile processes in JCSP to implement the allocation of tasks to cores based upon the work the core has done previously. Keywords. JCSP, multi-core processor, simulation, task allocation. Introduction Many manufacturers of semiconductor computer processors are designing multi-core systems these days [1]. In multi-core processing systems, allocation of work to processors can be seen as similar to the task of allocating work to people in a human society. A person responsible for controlling this process has to know the abilities of their employees and estimate the time in which a task can be finished. Tasks can often be finished faster if more workers are assigned to work on them. Generally, tasks can also be finished faster if they can be divided into smaller sub-tasks and sub-tasks can be processed concurrently. One very important condition that has to be met is that these sub-tasks have to be allocated wisely so that co-workers working on different sub-tasks can not hinder each other’s progress. The manager has to allocate the task to the worker that is the best for the assignment in current circumstances. Using this idea many contemporary scientists and engineers are building multi-core processing systems. Multi-core processor technology is one of the fastest developing hardware domains [2]. Modern personal computers already have multiple computing cores to increase a computer's performance. Multi-core systems for consumer electronics however have different challenges than those in personal computers. Targeted media processors have been a goal of research of many scientists. In paper [3] the authors are presenting a heterogeneous multiprocessor architecture designed for media processing. The multi-core architecture presented in [4] consist of three programmable cores specialized for frequently occurring media processing operations of higher complexity. Cores are fully programmable so they can be adapted to new algorithm developments in this field [4]. More advanced research was shown in [5] presenting heterogeneous multi-core processor capable of self reconfiguring to fit new requirements.