Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP
暂无分享,去创建一个
Hung-Ming Chen | Abhishek Patyal | Po-Cheng Pan | Asha K. A. | Wei-Zen Chen | Wei-Zen Chen | Hung-Ming Chen | Po-Cheng Pan | Abhishek Patyal | A. K. A.
[1] C. D. Gelatt,et al. Optimization by Simulated Annealing , 1983, Science.
[2] Yao-Wen Chang,et al. Simultaneous analog placement and routing with current flow and current density considerations , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).
[3] Yoji Kajitani,et al. Explicit expression and simultaneous optimization of placement and routing for analog IC layouts , 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.
[4] ChangYao-Wen,et al. Modern floorplanning based on B*-tree and fast simulated annealing , 2006 .
[5] Franziska Hoffmann,et al. Design Of Analog Cmos Integrated Circuits , 2016 .
[6] Nuno Horta,et al. LAYGEN II—Automatic Layout Generation of Analog Integrated Circuits , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[7] Nuno Horta,et al. Analog Integrated Circuit Design Automation: Placement, Routing and Parasitic Extraction Techniques , 2016 .
[8] H. Szu. Fast simulated annealing , 1987 .
[9] Chikaaki Kodama,et al. Linear Programming-Based Cell Placement With Symmetry Constraints for Analog IC Layout , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[10] Di Long,et al. Signal-path driven partition and placement for analog circuit , 2006, Asia and South Pacific Conference on Design Automation, 2006..
[11] Tsung-Yi Ho,et al. Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement , 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[12] Yao-Wen Chang,et al. Layout-dependent-effects-aware analytical analog placement , 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[13] Yao-Wen Chang,et al. Recent research development and new challenges in analog layout synthesis , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).
[14] Evangeline F. Y. Young,et al. Simultaneous Handling of Symmetry, Common Centroid, and General Placement Constraints , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[15] Yingtao Jiang,et al. Placement Algorithm in Analog-Layout Designs , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[16] Yao-Wen Chang,et al. Analog Placement Based on Symmetry-Island Formulation , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[17] Yoji Kajitani,et al. VLSI module placement based on rectangle-packing by the sequence-pair , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[18] Florin Balasa,et al. Symmetry within the sequence-pair representation in the context ofplacement for analog design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[19] Donald B. Johnson,et al. A priority queue in which initialization and queue operations takeO(loglogD) time , 1981, Mathematical systems theory.
[20] Ulf Schlichtmann,et al. Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.
[21] Chien-Hung Chen,et al. Fast analog layout prototyping for nanometer design migration , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[22] Evangeline F. Y. Young,et al. Analog Placement with Symmetry and Other Placement Constraints , 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.
[23] Hung-Ming Chen,et al. Configurable analog routing methodology via technology and design constraint unification , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[24] Shyh-Chang Lin,et al. Analog Placement Based on Novel Symmetry-Island Formulation , 2007, 2007 44th ACM/IEEE Design Automation Conference.
[25] Uta Boehm. Analog Layout Synthesis: A Survey of Topological Approaches , 2010 .
[26] Florin Balasa,et al. Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design , 2007, 2007 IEEE International Symposium on Circuits and Systems.
[27] Ricardo Povoa,et al. Current-flow and current-density-aware multi-objective optimization of analog IC placement , 2016, Integr..
[28] Jai-Ming Lin,et al. Routability-driven placement algorithm for analog integrated circuits , 2012, ISPD '12.
[29] Martin D. F. Wong,et al. Fast evaluation of sequence pair in block placement by longest common subsequence computation , 2000, DATE '00.