Sub-1V ultra low-power voltage reference
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[1] G. Iannaccone,et al. A Sub-1 V, 10 ppm/°C, Nanopower Voltage Reference Generator , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.
[2] R.A. Blauschild,et al. A new NMOS temperature-stable voltage reference , 1978, IEEE Journal of Solid-State Circuits.
[3] Hong-Zhou Tan,et al. An ultra-low-power CMOS voltage reference generator based on body bias technique , 2013, Microelectron. J..
[4] Anantha Chandrakasan,et al. Sub-threshold Design for Ultra Low-Power Systems , 2006, Series on Integrated Circuits and Systems.
[5] Tanaka Haruhiko,et al. Sub-1-/spl mu/A dynamic reference voltage generator for battery-operated DRAMs , 1994 .
[6] Shih-Chii Liu,et al. Analog VLSI: Circuits and Principles , 2002 .
[7] T. Yorozu,et al. Electron Spectroscopy Studies on Magneto-Optical Media and Plastic Substrate Interface , 1987, IEEE Translation Journal on Magnetics in Japan.
[8] Sheng Chen,et al. A clustering technique for digital communications channel equalization using radial basis function networks , 1993, IEEE Trans. Neural Networks.
[9] B. Gilbert. Translinear circuits: a proposed classification , 1975 .
[10] Giuseppe de Vita,et al. A Sub-1-V, 10 ppm/ $^{\circ}$C, Nanopower Voltage Reference Generator , 2007, IEEE Journal of Solid-State Circuits.
[11] H.J. Oguey,et al. MOS voltage reference based on polysilicon gate work function difference , 1979, IEEE Journal of Solid-State Circuits.
[12] B.M.J. Kup,et al. A DSP-based hearing instrument IC , 1997, IEEE J. Solid State Circuits.
[13] K. Sakui,et al. A CMOS bandgap reference circuit with sub-1-V operation , 1999 .
[14] G. Iannaccone,et al. A 300 nW, 12 ppm//spl deg/C Voltage Reference in a Digital 0.35 /spl mu/m CMOS Process , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..
[15] Y. Amemiya,et al. A 300 nW, 15 ppm/$^{\circ}$C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs , 2009, IEEE Journal of Solid-State Circuits.
[16] F. K. Becker,et al. Automatic equalization for digital communication , 1965 .
[17] Giuseppe Iannaccone,et al. A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference , 2011, IEEE Journal of Solid-State Circuits.