A new solution to on-line detection of Control Flow Errors

Transient faults can affect the behavior of electronic systems, and represent a major issue in many safety-critical applications. This paper focuses on Control Flow Errors (CFEs) and extends a previously proposed method, based on the usage of the debug interface existing in several processors/controllers. The new method achieves a good detection capability with very limited impact on the system development flow and reduced hardware cost: moreover, the proposed technique does not involve any change either in the processor hardware or in the application software, and works even if the processor uses caches. Experimental results are reported, showing both the advantages and the costs of the method.

[1]  Heidrun Engel,et al.  Data flow transformations to detect results which are corrupted by hardware faults , 1996, Proceedings. IEEE High-Assurance Systems Engineering Workshop (Cat. No.96TB100076).

[2]  Matteo Sonza Reorda,et al.  On the use of embedded debug features for permanent and transient fault resilience in microprocessors , 2012, Microprocess. Microsystems.

[3]  R. Velazco,et al.  Experimentally evaluating an automatic approach for generating safety-critical software with respect to transient errors , 2000 .

[4]  John Paul Shen,et al.  Processor Control Flow Monitoring Using Signatured Instruction Streams , 1987, IEEE Transactions on Computers.

[5]  Matteo Sonza Reorda,et al.  Control flow checking through embedded debug interface , 2011 .

[6]  Jian Huang,et al.  Exploiting basic block value locality with block reuse , 1999, Proceedings Fifth International Symposium on High-Performance Computer Architecture.

[7]  Marcus Rimén,et al.  A study of the effects of transient fault injection into a 32-bit RISC with built-in watchdog , 1992, [1992] Digest of Papers. FTCS-22: The Twenty-Second International Symposium on Fault-Tolerant Computing.

[8]  Massimo Violante,et al.  Software-level soft-error mitigation techniques , 2011 .

[9]  Edward J. McCluskey,et al.  Control-flow checking by software signatures , 2002, IEEE Trans. Reliab..

[10]  Régis Leveugle,et al.  A new approach to control flow checking without program modification , 1991, [1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium.

[11]  Alfredo Benso,et al.  A watchdog processor to detect data and control flow errors , 2003, 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003..

[12]  R. Leveugle,et al.  IDSM: An improved control flow checking approach with disjoint signature monitoring , 2009 .

[13]  Suku Nair,et al.  Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection , 1999, IEEE Trans. Parallel Distributed Syst..

[14]  Markus Kowarschik,et al.  An Overview of Cache Optimization Techniques and Cache-Aware Numerical Algorithms , 2002, Algorithms for Memory Hierarchies.

[15]  Jacob A. Abraham,et al.  CEDA: control-flow error detection through assertions , 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

[16]  Matteo Sonza Reorda,et al.  Exploiting the debug interface to support on-line test of control flow errors , 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

[17]  Jürgen Becker,et al.  A Fault Tolerant Approach to Detect Transient Faults in Microprocessors Based on a Non-Intrusive Reconfigurable Hardware , 2012, IEEE Transactions on Nuclear Science.

[18]  Jacob A. Abraham,et al.  ACCE: Automatic correction of control-flow errors , 2007, 2007 IEEE International Test Conference.

[19]  Matteo Sonza Reorda,et al.  An on-line fault detection technique based on embedded debug features , 2010, 2010 IEEE 16th International On-Line Testing Symposium.