An FFT Core for DVB-T/DVB-H Receivers

This paper presents the design and implementation of a pipeline radix-22 SDF FFT core for DVB-T/DVB-H receivers. DVB-T/DVB-H operation needs 2K/4K/8K multiple mode FFT processors. The necessary changes are introduced in the radix-22 SDF architecture to achieve an efficient FFT implementation. SNR and area results for different data and twiddle factor bitwidths are provided.

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