Scaling Down Area - Delay - Power Efficient Of Carry Select Adder Using Gdi

The Modified Gate Diffusion Input logic (Mod-GDI) is a novel technique for low power digital circuit design. This technique reduces the power dissipation, propagation delay, area of digital circuits. One of the fastest adders used in many dataprocessing processors to perform fast arithmetic function is Carry Select Adder. Simulations are done using Tanner EDA. We have omitted all the redundant logical operations in the conventional Carry Select Adder (CSLA) and proposed a new logic formulation for CSLA. In the proposed system, the carry select (CS) operation is done before the calculation of the final sum, which differs from the other conventional approach. This simulation results shows nearly 45% of reduction in power-delay product using Mod-GDI.

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