Spatio-Temporal Bias-Tunable Readout Circuit for On-Chip Intelligent Image Processing

A new 96 × 96 array of 30 μm × 30 μm readout integrated circuit (ROIC) with an individual pixel tunable bias control is demonstrated. Detailed IC design, test structures, readout circuit building blocks, and applied techniques are discussed. The new ROIC is capable of providing a large voltage swing for the bias in both positive and negative polarities to each individual pixel, independently. These enhanced functionalities are achieved by modifying a capacitive transimpedance amplifier (CTIA) CMOS ROIC architecture. An FPGA-based test bench has also been developed to test and characterize the new ROIC system, for which software and hardware are described in detail. The test chip has been fabricated with 2P4M 0.35 μm high-voltage CMOS technology, where the bias voltage range is ±5 V and the output swing range is ±3.9 V. The demonstrated ROIC is an ideal infrastructure for implementation of region of interest enhancement and a solid base for infrared multispectral acquisition targeting an infrared retina.

[1]  Phillip E Allen,et al.  CMOS Analog Circuit Design , 1987 .

[2]  David Jones.  High performance , 1989, Nature.

[3]  R. Street,et al.  Two-color amorphous silicon image sensor , 2001 .

[4]  A high performance, low-noise 128-channel readout integrated circuit for instrumentation and X-ray applications , 2004, IEEE Symposium Conference Record Nuclear Science 2004..

[5]  Sanjay Krishna.  Quantum dots-in-a-well infrared photodetectors , 2005 .

[6]  Wei Chen,et al.  Research of different structure integrated photodetectors in standard CMOS technology , 2008, SPIE/COS Photonics Asia.

[7]  S. Krishna,et al.  Demonstration of Bias-Controlled Algorithmic Tuning of Quantum Dots in a Well (DWELL) MidIR Detectors , 2009, IEEE Journal of Quantum Electronics.

[8]  Sanjay Krishna.  The infrared retina , 2009 .

[9]  Jason M. Mumolo,et al.  High performance two-color one megapixel CMOS ROIC for QWIP detectors , 2009 .

[10]  R. Etienne-Cummings,et al.  Which Photodiode to Use: A Comparison of CMOS-Compatible Structures , 2009, IEEE Sensors Journal.

[11]  David L. Sisson,et al.  A 1k-pixel CTIA readout multiplexer for far-IR photodetector arrays , 2010 .

[12]  S Krishna,et al.  Bias Switchable Dual-Band InAs/GaSb Superlattice Detector With pBp Architecture , 2011, IEEE Photonics Journal.

[13]  Steve Tanner,et al.  Low-noise amplifier with sample & hold for high-density stimulation and recording of neural signals , 2011, 2011 IEEE 9th International New Circuits and systems conference.

[14]  Sanjay Krishna,et al.  Multispectral Classification With Bias-Tunable Quantum Dots-in-a-Well Focal Plane Arrays , 2011, IEEE Sensors Journal.

[15]  Payman Zarkesh-Ha,et al.  Data compressive paradigm for multispectral sensing using tunable DWELL mid-infrared detectors. , 2011, Optics express.

[16]  W. Marsden.  I and J , 2012 .

[17]  Payman Zarkesh-Ha,et al.  Continuous time-varying biasing approach for spectrally tunable infrared detectors. , 2012, Optics express.

[18]  Payman Zarkesh-Ha,et al.  A new CMOS readout circuit approach for multispectral imaging , 2013, 2013 IEEE Photonics Conference.

[19]  Tai-Ping Sun,et al.  A novel readout integrated circuit with a dual-mode design for single- and dual-band infrared focal plane array , 2013 .

[20]  Payman Zarkesh-Ha,et al.  Spatio-temporal tunable pixels for multi-spectral infrared imagers , 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

[21]  Payman Zarkesh-Ha.  An intelligent readout circuit for infrared multispectral remote sensing , 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).

[22]  Payman Zarkesh-Ha,et al.  A novel readout circuit for on-sensor multispectral classification , 2014, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS).