Optimizing Task Migration Transfers Using Multistage Cube Networks

As hardware and software technology progresses, the interest in large-scale parallel processing systems is increasing. Making such a system partitionable into independent subsystems has many advantages. To maximize these benefits, it may be necessary to move (migrate) a job from one submachine (partition) to another. Here, machines based on multistage cube networks are considered. Assume the task is to be migrated from a given set of K source PEs, Ps, to a given set of K destination PEs, P j . A mapping to determine which PE in Pd is to receive data from each PE in Ps is given. It is proven that this mapping will allow the task migration to be performed in the minimum amount of time. An equation for determining this minimum time is derived. The results are shown for both packetand circuit-switched multistage cube networks. The techniques presented can be used as part of a strategy for making decisions as to whether to migrate a task and which partitions to use as source and destination of the migration.

[1]  Andrew B. Whinston,et al.  A Model for an Intelligent Operating System for Executing Image Understanding Tasks on a Reconfigurable Parallel Architecture , 1985, J. Parallel Distributed Comput..

[2]  Kenneth E. Batcher,et al.  The flip network in staran , 1976 .

[3]  Howard Jay Siegel,et al.  Using the multistage cube network topology in parallel supercomputers , 1989 .

[4]  Tse-Yun Feng,et al.  On a Class of Multistage Interconnection Networks , 1980, IEEE Transactions on Computers.

[5]  Howard Jay Siegel,et al.  Interconnection networks for large-scale parallel processing: theory and case studies (2nd ed.) , 1985 .

[6]  Gregory F. Pfister,et al.  “Hot spot” contention and combining in multistage interconnection networks , 1985, IEEE Transactions on Computers.

[7]  Robert H. Thomas,et al.  Performance Measurements on a 128-Node Butterfly Parallel Processor , 1985, International Conference on Parallel Processing.

[8]  Marshall C. Pease,et al.  The Indirect Binary n-Cube Microprocessor Array , 1977, IEEE Transactions on Computers.

[9]  Kevin P. McAuliffe,et al.  The IBM Research Parallel Processor Prototype (RP3): Introduction and Architecture , 1985, ICPP.

[10]  G. Jack Lipovski,et al.  Parallel computing - theory and comparisons , 1987 .

[11]  Duncan H. Lawrie,et al.  Access and Alignment of Data in an Array Processor , 1975, IEEE Transactions on Computers.

[12]  L. W. Tucker,et al.  Architecture and applications of the Connection Machine , 1988, Computer.

[13]  Howard Jay Siegel,et al.  A model of task migration in partitionable parallel processing systems , 1988, Proceedings., 2nd Symposium on the Frontiers of Massively Parallel Computation.

[14]  Thomas L. Casavant,et al.  Task Migration Transfers in Multistage Cube Based Parallel Systems , 1989, ICPP.

[15]  Michael J. Flynn,et al.  Very high-speed computing systems , 1966 .