Algorithms and Architectures for Parallel Processing

Graph embeddings are not only used to study the simulation capabilities of a parallel architecture but also to design its VLSI layout. The n-dimensional hypercube is one of the most popular topological structure for interconnection networks in parallel computing and communication systems. The exchanged hypercube EHs,t (where s ≥ 1 and t ≥ 1) is obtained by systematically deleting edges from a hypercube Qs+t+1, which retains several valuable and desirable properties of the hypercube such as a small diameter, bipancyclicity, and super connectivity. In this paper, we identify maximum induced subgraph of EHs,t and study embeddings of EHs,t into a ring and a ladder with minimum wirelength.

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