An evolutionary computing approach to multilevel logic synthesis using various logic operations

This paper discusses the logic synthesis of multilevel circuits using various operations. We suppose target circuits having no loop back connections and usable any logic function in any part of the multilevel circuits. In this paper, we use MIN, MAX, TSUM and MODSUM functions as functions of logic gates. We minimize the circuit using the Genetic Algorithms. We encode each logic gate to the series of numbers representing a function and its connections and represent the circuit by a chromosome arranging the numbers for all logic gates. We show that our GAs can design a given function with more flexible structures.

[1]  W. Wang,et al.  Evolutionary synthesis of current-mode CMOS 4-valued circuits , 1996, Proceedings of Third International Conference on Signal Processing (ICSP'96).

[2]  N. Kamiura,et al.  Multiple-valued logic minimization by genetic algorithms , 1997, Proceedings 1997 27th International Symposium on Multiple- Valued Logic.

[3]  Julian F. Miller,et al.  Multiple Valued Combinational Circuits Synthesized using Evolvable Hardware , 1998 .

[4]  Claudio Moraga,et al.  Design of multivalued circuits using genetic algorithms , 1996, Proceedings of 26th IEEE International Symposium on Multiple-Valued Logic (ISMVL'96).

[5]  Claudio Moraga,et al.  Evolutionary methods in the design of quaternary digital circuits , 1998, Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138).

[6]  Tsutomu Sasao,et al.  Multiple-valued minimization to optimize PLAs with output EXOR gates , 1999, Proceedings 1999 29th IEEE International Symposium on Multiple-Valued Logic (Cat. No.99CB36329).

[7]  Tsutomu Sasao On the Optimal Design of Multiple-Valued PLA's , 1989, IEEE Trans. Computers.

[8]  Yutaka Hata,et al.  On low cost realization of multiple-valued logic functions , 1998, Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138).

[9]  Tsutomu Sasao EXMIN: a simplification algorithm for exclusive-OR-sum-of-products expressions for multiple-valued input two-valued output functions , 1990, Proceedings of the Twentieth International Symposium on Multiple-Valued Logic.

[10]  Yutaka Hata,et al.  Comparison of Logic Operators for Use in Multiple-Valued Sum-of-Products Expressions (Special Issue on Multiple-Valued Logic and Its Applications) , 1999 .

[11]  笹尾 勤,et al.  A design method for three - level logic circuits , 1988 .