OctCNN: An Energy-Efficient FPGA Accelerator for CNNs using Octave Convolution Algorithm

Recently, embedded FPGAs have been explored as a potential platform for deploying machine learning on edge-devices due to their high energy efficiency and low cost. However, the lack of resources also makes the deployment of CNN on FPGAs more challenging. In this paper, we present OctCNN, which utilizes the octave convolution (OctConv) algorithm to optimize the FPGA-based CNN accelerator. We first propose a novel architecture for deploying OctConv on FPGAs and then present a resource and performance analysis model to guide a fast design space exploration. As a case study, we implement a classic CNN model, VGG16, on Xilinx ZC702. Results show, compared to the mobile-class CPU and GPU, OctCNN achieves $\mathbf{16.88}\times$ and $\mathbf{2.43}\times$ energy efficiency, respectively. Besides, it has a promising energy efficiency compared to previous FPGA accelerators.