Centralised Domain Based Faulty Node and Link Elimination in Hexagonal Node Based NoC

The NoC Architecture plays crucial role while designing communication systems for System on Chip (SoC). The NoC architecture is improved over conventional bus, shared bus design and cross bar interconnection architecture for on chip networks. In order to improve the Quality of Service, Congestion, Throughput and latency in NoC, Hexagonal node based architecture is proposed in our previous paper[14]. The challenge in the hexagonal node based NoC architecture is to eliminate the faulty link or node failure in the SoC without impacting the communication between node and maintain same throughput, latency and quality of service by converging the NoC. In this paper, we propose the effective approach to eliminate the faulty node or Links in NoC without impacting SoC functionality.

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