Static Memory and Timing Analysis of Embedded Systems Code
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[1] Reinhard Wilhelm,et al. Determining Bounds on Execution Times , 2005, Embedded Systems Handbook.
[2] Per Stenström,et al. Timing anomalies in dynamically scheduled microprocessors , 1999, Proceedings 20th IEEE Real-Time Systems Symposium (Cat. No.99CB37054).
[3] Reinhard Wilhelm,et al. Analysis of Loops , 1998, CC.
[4] Stephan Thesing,et al. Pipeline Modeling for Timing Analysis , 2002, SAS.
[5] Henrik Theiling,et al. Extracting safe and precise control flow from binaries , 2000, Proceedings Seventh International Conference on Real-Time Computing Systems and Applications.
[6] Henrik Theiling. Generating Decision Trees for Decoding Binaries , 2001 .
[7] Henrik Theiling,et al. Combining abstract interpretation and ILP for microarchitecture modelling and program path analysis , 1998, Proceedings 19th IEEE Real-Time Systems Symposium (Cat. No.98CB36279).
[8] Jörn Schneider,et al. Pipeline behavior prediction for superscalar processors by abstract interpretation , 1999, LCTES '99.
[9] Christian Ferdinand,et al. Cache behavior prediction for real-time systems , 1997 .
[10] Henrik Theiling,et al. Reliable and Precise WCET Determination for a Real-Life Processor , 2001, EMSOFT.
[11] Patrick Cousot,et al. Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints , 1977, POPL.
[12] Henrik Theiling. ILP-Based Interprocedural Path Analysis , 2002, EMSOFT.
[13] John A. Stankovic. Real-time and embedded systems , 1996, CSUR.
[14] Reinhard Wilhelm,et al. The influence of processor architecture on the design and the results of WCET tools , 2003, Proceedings of the IEEE.