FA 14.6: A iGb DRAM for File Applications
暂无分享,去创建一个
Toshiro Itani | Kunihiko Kasama | Tadahiko Sugibayashi | K. Koyama | Ryuichi Oikawa | Shuichi Ohya | T. Okuda | Kentaro Shibahara | Satoshi Utsugi | Shinichi Fukuzawa | Masaki Ogawa | Hidemitsu Mori | Tatsunori Murotani | Shouichi Iwao
[1] H. Komiya,et al. Future technological and economic prospects for VLSI , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[2] Yukihito Oowaki,et al. An experimental DRAM with a NAND-structured cell , 1993 .
[3] Masashi Horiguchi,et al. 256-Mb DRAM circuit technologies for file applications , 1993 .
[4] M. Aoki,et al. A High-Speed, Threshold-Voltage-Mismatch Compensation Sense Amplifier for Gb-scale DRAM Arrays , 1992, ESSCIRC '92: Eighteenth European Solid-State Circuits conference.