Contribution to stability analysis of power hardware-in-the-loop simulators

This study establishes a new basis for understanding the stability of power hardware-in-the-loop (PHIL) systems considering their hybrid (analogue/digital) nature. Such systems are known to have closed-loop stability issues due to delays between the simulator and the power amplifier (PA). This work demonstrates that the conventional method for determining the stability criterion, which considers the system as a continuous model, is not appropriate. A new method of assessing the stability of a PHIL system based on discrete-time impedance frequency responses is thus presented. Hydro-Quebec's Research Institute will use this innovative approach for the development of its own PHIL system, which will involve connecting the institute's real-life experimental distribution test line to its large-scale real-time digital simulator through a 25-kV, 10-MVA PA. The validity of the new method is demonstrated for simulation models of a well-known inductive system and of a distribution feeder connected to a large-scale power system.

[1]  Alexander Viehweider,et al.  Power hardware in the loop simulation with feedback current filtering for electric systems , 2011, IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society.

[2]  Alexander Viehweider,et al.  Interface and Stability Issues for SISO and MIMO Power Hardware in the Loop Simulation of Distribution Networks with Photovoltaic Generation , 2012 .

[3]  A. M. Gole,et al.  Compensating for Interface Equipment Limitations to Improve Simulation Accuracy of Real-Time Power Hardware In Loop Simulation , 2012, IEEE Transactions on Power Delivery.

[4]  Felix Lehfuss,et al.  The Limitations of Digital Simulation and the Advantages of PHIL Testing in Studying Distributed Generation Provision of Ancillary Services , 2015, IEEE Transactions on Industrial Electronics.

[5]  Gilbert Sybille IREQ's innovations in power system simulation , 2010 .

[6]  A. Monti,et al.  A novel interface for power-hardware-in-the-loop simulation , 2004, 2004 IEEE Workshop on Computers in Power Electronics, 2004. Proceedings..

[7]  C Dufour,et al.  Interfacing Issues in Real-Time Digital Simulators , 2011, IEEE Transactions on Power Delivery.

[8]  G. Ledwich,et al.  Power Network in Loop: A Paradigm for Real-Time Simulation and Hardware Testing , 2010, IEEE Transactions on Power Delivery.

[9]  Robert Fischl,et al.  Modeling and stability analysis of a simulation-stimulation interface for hardware-in-the-loop applications , 2007, Simul. Model. Pract. Theory.

[10]  Venkata Dinavahi,et al.  Hardware-in-the-Loop Simulation of Power Electronic Systems Using Adaptive Discretization , 2010, IEEE Transactions on Industrial Electronics.

[11]  Salvatore D'Arco,et al.  Comparing the Dynamic Performances of Power Hardware-in-the-Loop Interfaces , 2010, IEEE Transactions on Industrial Electronics.

[12]  Geza Joos,et al.  Load design for a 25 kV distribution test line , 2013, 2013 IEEE Power & Energy Society General Meeting.

[13]  Denis Faubert,et al.  Hydro-Québec’s research institute. Forty years of achievements , 2010 .

[14]  Alexander Viehweider,et al.  Stabilization of Power Hardware-in-the-Loop simulations of electric energy systems , 2011, Simul. Model. Pract. Theory.

[15]  D. McNabb,et al.  Validation Tests of The Hypersim Digital Real Time Simulator with a Large AC-DC Network , 2003 .

[16]  Karl Schoder,et al.  Power hardware-in-the-loop testing of a 500 kW photovoltaic array inverter , 2012, IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society.

[17]  Antonello Monti,et al.  Fault ride through certification of wind turbines based on a power hardware in the loop setup , 2013, 2013 IEEE International Workshop on Applied Measurements for Power Systems (AMPS).

[18]  Chad Abbey Advanced distribution system research on a 25 kV distribution test line , 2010 .

[19]  G. Ledwich,et al.  Studies in power hardware in the loop (PHIL) simulation using real-time digital simulator (RTDS) , 2012, 2012 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES).

[20]  Karl Schoder,et al.  Characteristics and Design of Power Hardware-in-the-Loop Simulations for Electrical Power Systems , 2016, IEEE Transactions on Industrial Electronics.

[21]  C. S. Edrington,et al.  Improved power hardware in the loop interface methods via impedance matching , 2013, 2013 IEEE Electric Ship Technologies Symposium (ESTS).

[22]  G. M. Burt,et al.  A new control method for the power interface in power hardware-in-the-loop simulation to compensate for the time delay , 2014, 2014 49th International Universities Power Engineering Conference (UPEC).