Oct-tree-based multilevel low-rank decomposition algorithm for rapid 3-D parasitic extraction

Fast parasitic extraction is an integral part of high-speed microelectronic simulation at the package and on-chip level. Integral equation methods and related fast solvers for the iterative solution of the resulting dense matrix systems have enabled linear time complexity and memory usage. However, these methods tend to have large disparities between setup and matrix-vector product times that affect their efficiency when applied to multiple excitation problems, i.e., problems with a large number of nets. For example, FastCap, which is based on the fast multipole method, has a significantly faster setup time than the multilevel QR decomposition-based IES/sup 3/, but relatively slow matrix-vector products. In this paper, we present a novel oct-tree-based QR compression technique for fast iterative solution. The regular cube structure of the fast multipole method and the QR compression scheme for interaction submatrices as in IES/sup 3/ are combined to achieve a predetermined compressible matrix-block structure and, consequently, superior memory, setup, and solve time efficiencies.

[1]  S. Kapur,et al.  IES/sup 3/: efficient electrostatic and electromagnetic simulation , 1998 .

[2]  D. Wilton,et al.  Potential integrals for uniform and linear source distributions on polygonal and polyhedral domains , 1984 .

[3]  Henk A. van der Vorst.  Krylov subspace iteration , 2000, Comput. Sci. Eng..

[4]  R.A. Rohrer,et al.  On-chip interconnect modeling technologies , 1997, Electrical Performance of Electronic Packaging.

[5]  Asim Husain.  Models for interconnect capacitance extraction , 2001, Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design.

[6]  Kaushik Roy,et al.  A novel high-performance predictable circuit architecture for the deep sub-micron era , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[7]  Jacob K. White,et al.  A precorrected-FFT method for electrostatic analysis of complicated 3-D structures , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  Jinsong Zhao,et al.  Efficient full-wave simulation in layered, lossy media , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[9]  Kapur,et al.  IES/sup 3/: a fast integral equation solver for efficient 3-dimensional extraction , 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[10]  Kaushik Roy,et al.  O2ABA: a novel high-performance predictable circuit architecture for the deep submicron era , 2002, IEEE Trans. Very Large Scale Integr. Syst..

[11]  Richard J. Anderson.  Tree data structures for N-body simulation , 1996, Proceedings of 37th Conference on Foundations of Computer Science.

[12]  Peter Benner,et al.  KRYLOV SUBSPACE ITERATION , 2005 .

[13]  Kenneth S. Kundert,et al.  Design of mixed-signal systems-on-a-chip , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[14]  Keshab K. Parhi,et al.  Efficient crosstalk estimation , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

[15]  David J. Allstot,et al.  Simulation techniques and solutions for mixed-signal coupling in integrated circuits , 1994 .

[16]  A. Ruehli,et al.  Efficient Capacitance Calculations for Three-Dimensional Multiconductor Systems , 1973 .

[17]  David E. Long,et al.  IES3: a fast integral equation solver for efficient 3-dimensional extraction , 1997, ICCAD.

[18]  Andreas C. Cangellaris,et al.  Rapid calculation of electrostatic Green's functions in layered dielectrics , 2001 .

[19]  Tai-Yu Chou,et al.  Capacitance calculation of IC packages using the finite element method and planes of symmetry , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[20]  G. Servel,et al.  On-chip crosstalk evaluation between adjacent interconnections , 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).

[21]  Jacob K. White,et al.  FastCap: a multipole accelerated 3-D capacitance extraction program , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[22]  Roger F. Harrington,et al.  Field computation by moment methods , 1968 .