ARQUITECTURA DE ALTO RENDIMIENTO PARA PROCESADORES DIFUSOS

Fuzzy logic has become a very good choice to represent uncertain models of complex systems that cannot be easily represented in terms of conventional mathematics. Specifically fuzzy hardware has turned to be the choice to reach high speed inference rates, which has been presented on high performance applications such as water treatment, robotics, pattern recognition, among other efficient applications of fuzzy systems. There are two forms to represent membership values universe: first one is when floating point numbers are used, second form is when integer universe is used. In the first case result of operations belongs to [0, 1], in the second case results belong to interval of integers [0, 1 2 − m ], where m is the number of bits used according to application resolution demands. This case is fully compatible with digital computers because floating point operations consume much more time and resources than integer operations. This work presents a method to implement fuzzy logic inference engine for discrete implementations which includes a new method for defuzzification, with the objective of reducing the number of instructions to be executed, having as consequence fewer processing time and less resources consumed. Simulation results for new methods are considered. For tuning fuzzy systems there are various methods that require adjustment of membership functions, another methods for tuning fuzzy systems are based on parametric operations for conjunction and disjunction. The problem of construction of parametric classes of fuzzy conjunction and disjunction operations suitable for effective digital hardware implementation is studied. The new method of generation of fuzzy parametric conjunctions by means of other fuzzy conjunctions, disjunctions and generators is proposed. The approach is based on the use of simple parametric generators together with min-max, Lukasiewicz and drastic t-norms and t-conorms that have effective digital implementation. Several simple parametric classes of generators are proposed and examples of parametric conjunctions generated by means of these generators and basic t-norms and tnorms are considered. Circuits for basic construction blocks are implemented on VLSI hardware using FPGA programmable devices, simulation results are presented.

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