High speed sense amplifier with efficient pre-charge scheme for PCM in the 28nm process

An improved sense amplifier with speed-up pre-charge scheme is introduced in this paper. What’s more, in order to avoid unexpected fatal damage while reading operation, clamp voltage is adopted. Distinguished with the conventional current sense amplifier, the proposed sense amplifier shortens not only the read access time by reducing the charging time due to parasite capacitor of storage cells but also the delay time because of the RC delay on wire by using two branches of pre-charge circuit at the both ends of bit lines. The simulation result taken in SMIC 28nm process shows that, with 1Kb PCM array, the proposed sense amplifier can efficiently reduce the access time from 33.7ns to 16.5ns.