A yield improvement technique for IC layout using local design rules

The concept of local design rules is introduced. These are integrated circuit (IC) layout rules that define the optimum feature size and spacing in relation to the surrounding geometry and are used to increase the yield of ICs. The impact of these rules on the performance and reliability of ICs is discussed. Algorithms that enable the automatic application of track displacement, track width, and contact size local design rules to IC layout are presented. Simulation results are provided for some layout examples. >

[1]  Anthony J. Walton,et al.  Contact resistance of silicon-polysilicon interconnection for different current-flow geometries , 1985 .

[2]  S. Gandemer,et al.  Critical area and critical levels calculation in IC yield modeling , 1988 .

[3]  Randy Lee Brown Multiple Storage Quad Trees: A Simpler Faster Alternative to Bisector List Quad Trees , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[4]  Erich Gamma,et al.  Design and Implementation of ET++, a Seamless Object-Oriented Application Framework 1 , 1989 .

[5]  Andrzej J. Strojwas,et al.  Realistic Yield Simulation for VLSIC Structural Failures , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  Wu-Shiung Feng,et al.  Using a multiple storage quad tree on a hierarchical VLSI compaction scheme , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[7]  R.D. Rung Determining IC layout rules for cost minimization , 1981, IEEE Journal of Solid-State Circuits.

[8]  Charles H. Stapper,et al.  Modeling of Integrated Circuit Defect Sensitivities , 1983, IBM J. Res. Dev..

[9]  D. M. H. Walker,et al.  VLASIC: A Catastrophic Fault Yield Simulator for Integrated Circuits , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[10]  Gershon Kedem,et al.  The quad-cif tree a data structure for h , 1981, DAC 1982.

[11]  Duncan M. Walker Yield simulation for integrated circuits , 1987 .

[12]  Akira Onozawa Layout compaction with attractive and repulsive constraints , 1991, DAC '90.