A 1.1 V low-power /spl Sigma//spl Delta/ modulator for 14-b 16 kHz A/D conversion

This paper presents a second order /spl Sigma//spl Delta/ modulator implementation for a supply voltage of 1.1 V. A new fully-differential CMOS operational amplifier has been designed in order to achieve high-resolution under very-low-voltage operation. The design relies on the elimination of critical switches by using a voltage doubler. The modulator has been implemented using the AMS CDS 0.35 /spl mu/m CMOS technology and postlayout simulations have been performed. These simulations showed 14 bits of resolution with an oversampling ratio of 166.

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