论文信息 - FPGA-Based Vector Floating-Point Unit with Software-Implemented Division

FPGA-Based Vector Floating-Point Unit with Software-Implemented Division

Gutknecht for their help, support and for the opportunity to work in this group and design the things I always wanted to. I would like to thank them for trusting and considering my work; for validating it into the " real world " ! I am grateful to Ling for her promptness to answer my questions! She always interrupted her current tasks to help me when I needed it! I would also like to take this opportunity to thank Ms. Judith Zimmermann for her absolutely great support during my studies! Last but not least, I'd like to thank Andrea, for her help, support and understanding!

Felix Friedrich | Ling Liu

[1] Viktor K. Prasanna,et al. Analysis of high-performance floating-point arithmetic on FPGAs , 2004, 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings..

[2] Brent E. Nelson,et al. Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture , 2002, FPL.

[3] Shawki Areibi,et al. Feasibility of Floating-Point Arithmetic in FPGA based Artificial Neural Networks , 2002 .

[4] Michael J. Flynn,et al. An improved algorithm for high-speed floating-point addition , 1990 .

[5] David A. Patterson,et al. Computer Architecture - A Quantitative Approach, 5th Edition , 1996 .

[6] Michael J. Flynn,et al. ONE PREDICTION-IMPLEMENTATION , GENERALIZATION , AND APPLICATION , 1998 .

[7] Amos R. Omondi,et al. Computer arithmetic systems - algorithms, architecture and implementation , 1994, Prentice Hall International series in computer science.

[8] Michael J. Flynn,et al. Reducing the Mean Latency of Floating-Point Addition , 1998, Theor. Comput. Sci..

[9] Reinhard Männer,et al. Using floating-point arithmetic on FPGAs to accelerate scientific N-Body simulations , 2002, Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.