IDDT Testing: An Efficient Method for Detecting Delay Faults and Open Defects *

Some open defects in VLSI circuits may cause delay faults, and testing of open defects and delay faults remain difficult problem. In this paper, we show that i) some open defects cause delay faults and ii) those open defects and delay faults cause variations in I DDT waveforms. We propose a new IDDT testing method for detection of open defects and delay faults. Our method exploits the phenomenon that an open defect generates a local maximum in the I DDT waveform. We present experimental results performed on two test chips.

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