Optimisation of the process control in a semiconductor company: model and case study of defectivity sampling

This article studies the skip, under some assumptions, of process control operations. The case of one tool, one enhanced buffer and one metrology tool of a monotonic parameter is analysed. This article presents circumstances in which control plan can be optimised due to the buffer's behaviour. After discussing the industrial issue of defectivity, this article presents a literature review followed by the model and steps towards industrial development. Then demonstrator, which is applied at a case study of defectivity sampling, is presented. A test of over a 300-mm wafer fabrication data set shows serious improvements – around 35% of defectivity controls have been skipped compared to the static sampling plan.

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