A 3-5.5 V CMOS 32 Mb/s fully-integrated read channel for disk-drives

A low-power (300-mW), 10-32-Mb/s fully integrated CMOS read-channel IC that can operate from a single 3-5.5-V supply for battery-operated disk drive applications has been developed. The chip includes an automatic gain control (AGC), a programmable 3.5-16-MHz sixth-order linear-phase equalization filter, a servo demodulator, a pulse detector, a frequency synthesizer, data separator, and an encoder/decoder. The architecture of the chip provides a high degree of programmability for zoned-recording and embedded-servo operation, switching between servo and data mode characteristics in less than 1 /spl mu/s, and uses a reduced number of external passive components (eight capacitors and five resistors).