论文信息 - Dynamic Partial Reconfiguration in FPGAs

Dynamic Partial Reconfiguration in FPGAs

Dynamic parital reconfigurable FPGAs offer new design space with a variety of benefits: reduce the configuration time and save memory as the partial reconfiguration files (bitstreams) are smaller than full ones. This paper introduces a simple reconfigurable system and focuses on the advantages of the newest dynamic partial reconfiguration design flow.

Wang Lie | Wu Feng-yan | Wang Lie | Wu Feng-yan

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