A Reconfigurable Arithmetic Processor

The Reconfigurable Arithmetic Processor (RAP) is capable of performing the complex, high-speed numerical calculations required for many new applications. The following eight complex functions are implemented in a single pipelined arithmetic unit: t . y, t + y, t y, (t + Y ) ~ , (t y)', xz . y, 21 . y1 22 . y2 . . ., and a Successive Approximation function. These operations can be chained together to perform a combination of these arithmetic functions. This paper discusses the innovative architectural changes used to enhance the pipeline operation, the hardware design of the 4-bit prototype and evaluates the propagation delays. The performance of the processor is projected for datayath widths from 4 to 32 bits.